ALTERA CYCLONE II DRIVER DETAILS:
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ALTERA CYCLONE II DRIVER
I, the altera cyclone ii holder of this work, hereby release it into the public domain. What I would like to do is start a thread on this where I can post everything we're doing step-by-step for others to follow along altera cyclone ii perhaps even suggest improvements. But I can't do it alone since I'm not clear myself on exactly how to work with the software tools. So the project right now is the following: I have a 50 MHz clock. This clock needs to be reduced to 1 Hz. The very first thing I would like to do is write a hardware schematic that achieves this reduction using the fewest possible logic gates.
Anyone use Altera Quartus II software and Cyclone II FPGA? - Page 1
Then learn how to write a VHDL description that will produce the same hardware using the same number of gates. Again, just for the purpose of understanding how to use these design tools. But I don't want to altera cyclone ii into that until I've gained a really solid understanding of how to program the FPGA in general.
But for now, I just want to start with this very basic project. Big dreams.
But I want to start with very simple stuff until I feel confident with the tools. Anyone interested in contributing to this project?
Altera Cyclone II FPGA Mini
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Cyclone II FPGAs
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Al. Altera Cyclone® Altera cyclone ii 90nm FPGAs are built from the ground up for the low cost and to provide a customer-defined feature set for high volume, cost-sensitive applications. Cyclone II FPGAs extend the low-cost FPGA density range to 68, Logic Elements (LEs) and provide up to